November 01 2004:

Over the last Series of articles we have covered the emerging tech landscape that has seen the dramatic shift away from the megahertz madness of the past, to the welcome move towards parallelism - increasing performance by utilising multiple thread enabled, slower but wider, CPU’s/Core’s via high-bandwidth connections.

First, a bit of History. The Industry’s motivation has always maintained a close association with Moore’s Law, which is, and I quote “The observation made in 1965 by Gordon Moore, co-founder of Intel, that the number of transistors per square inch on integrated circuits had doubled every year since the integrated circuit was invented.” Moore predicted that this trend would continue for the foreseeable future. In recent years, the pace slowed down a bit, but data density has still doubled approximately every 18 months, and this is the current definition of Moore's Law. Most experts expect Moore's Law to hold for at least another two decades.

In the past, most had applied the law to signify the increases in clockspeed, but with the recent developments all have conceded that performance scaling will come not from increases in MHz ratings but in bandwidth. Intel, the main culprit in the MHz frenzy, explicitly and repeatedly stated in their recent IDF keynote that the days of MHz as a (flawed) performance metric and marketing tool are at an end.

Doh, thanks for the heads up!!

The recent problems with the transition to .09 micron manufacturing processes by both Intel and IBM (Apple) further highlighted the fact that the current technology had reached a point that performance scaling by clockspeed alone had reached its peak, and a new paradigm of high-bandwidth multiprocessing was the way to higher performance scaling. The woes that befell Intel’s Prescott/Nocona have been widely reported with both suffering from extreme and unexpected thermal problems, which subsequently impeded the ability to scale the clockspeed as expected. Intel have recently improved the thermal characteristics of the cores with improved stepping and some tweaks in the manufacturing process, and subsequently, have begun scaling the units to 3.6 GHZ, with a 4.0 GHZ unit expected in a few months. Nothing really to sing about tho considering the extended pipeline the units have utilised to get the extra clock cycles.

IBM (Apple) suffered a very similar fate with the transition, and subsequently failed to deliver the much-hyped 3.0 GHZ rating as promised by Steve Jobs. One of the most revealing insights into the hurdles being faced was from IBM’s chief technical officer Bernie Meyerson, when he stated, quote: "Somewhere between .13 nm and .09 nm the whole system fell apart. Things stopped working and nobody seemed to notice. Scaling is already dead but nobody noticed it had stopped breathing and its lips had turned blue." Ouch!!! Apple did manage to overclock the current .09 units to 2.5 GHZ, but needed to water cool the system to keep the thermals in check. Its all starting to feel like a “ band-aide on a bullet wound “ :-) AMD have remained coy about their own transition to .09 Micron, but have stated that they have not suffered the same challenges that the others have endured. Mind you, we still haven’t seen any major leaps in scaling, and also, despite reports of .09 chips being shipped to clients, no one is yet to see one in the flesh. Ah, the Paper Launch Pimps are back again!